I am an Associate Professor of computer architecture and technology at the University of Murcia, Spain. I joined the Computer Engineering Department (DiTEC) in 1998, after I received the MS degree in computer science. I started as a Teaching Assistant. At the same time, I began my work on my PhD thesis. In march 2003,  after four years of hard work, I was awarded my PhD. After that, I became an Assistant Professor in 2004, and subsequently, an Associate Professor in 2008. Additionally, in 2002 I worked as a summer intern at IBM TJ Watson, Yorktown Heights (NY), in the context of the BlueGene/L project.

Currently, I lead the Computer Architecture & Parallel Systems (CAPS) research group, which is part of the ACCA group. My research interests are focused on the architecture of multiprocessor systems. More specifically, I am working on prediction and speculation in multiprocessor memory systems, synchronization in CMPs, power-aware cache-coherence protocols for CMPs, fault tolerance, and hardware transactional memory systems. From 2011 to 2015 I served as associate editor of IEEE TPDS Int'l Journal. I am co-author of more than 100 papers in impact international conferences and journals, and I have been part of the program committee of several important international conferences.

Contact Information

Manuel E. Acacio
Campus de Espinardo
Facultad de Informática
30100 Murcia (SPAIN)

e-mail: meacacio [at] um [dot] es
Office: 3.34
Phone: +34 868 883983
Fax: +34 868 884151